Design of Fault-Tolerant Circuit Based on Programmable Logic Device and VHDL 基于可编程逻辑器和VHDL语言的容错电路设计
In the traditional OOP method, to achieve fault-tolerant we must explicitly add fault tolerant logic in all core concerns, which destroys the object-oriented encapsulation thought, inevitably lead to scattering or tangling, and affect further development or remodeling. 在传统的OOP方法中,要实现容错必须在所有核心关注点中显式地加入容错逻辑,这破坏了面向对象的封装思想,必然会导致散射或缠结,影响进一步的开发或重构。
Fault-tolerant routing has very complicated logic, amounts of calculation and processing delay, and also high consumption of energy. 容错路由逻辑复杂,有一定计算量,能耗也较高。